J-VIC, FPGA 6569

FPGA 6569 - J-VIC

  • FPGA based replacement for MOS 6569 VIC-II
  • Project started in 2020. Basic video output with all video modes achieved the same year.
  • Project goal is to make 100% compatible FPGA replacement for MOS 6569, that is physically same size as original
  • One goal is to learn more about FPGA designing, so all the code is completely self written
  • October 2022 status:

  • About 90% complete. Fully usable, with some issues with some games and demos
  • PCB needs some modifications
  • VSP, FLI, Sprite crunch, Line crunch, Sprite stretch, Sprite multiplexing, border opening and other demo effects working
  • Some minor timing issues needs to be resolved
  • Light pen support not yet implemented
  • Sprite collision detection not implemented
  • January 2023 status:

  • Fixed some issues, but still some small issues with some games and demos
  • New pcb:
  • Check out also: J-CIA / J-CPU / VIDS

    Back to index

    Finland 2020-2023 Jani Laatikainen